偏头痛中的小脑：解剖学、影像学与临床证据的叙述性综述

文献信息

中文摘要

背景： 偏头痛通常通过三叉血管通路以及脑干、下丘脑和皮层之间的相互作用来加以描述。尽管人类研究将小脑置于处理三叉神经伤害性感受和前庭信号的环路之中，但小脑受到的关注较少。本叙述性综述考察了解剖学和实验研究以及影像学、遗传学和临床研究，并最重视直接的人类偏头痛证据。方法：重复测量影像学提示小脑连接性在偏头痛周期中发生变化，但队列规模较小。结果：结构发现因分析方法而异，基于人群的检测并未显示常见偏头痛中存在普遍的小脑缺陷。在特定情境中证据更为一致：三叉神经刺激可募集VI/VIIIa小叶和Crus I，前庭性偏头痛涉及后部小脑及更广泛的前庭感觉网络，治疗影像学显示小脑变化，但未定位CGRP导向作用的部位。药物过度使用性头痛和家族性偏瘫性偏头痛的发现提供了额外的状态相关和机制性线索。结论：综合来看，小脑最好被视为分布式偏头痛网络中的调节性组分，可能在感觉增益和前庭整合中发挥作用。它既不是已证实的发作发生器，也不是经过验证的治疗靶点。下一步是检验个体内小脑测量指标是否在各次发作间可重复，以及干预是否改变预先指定的环路水平终点。

英文摘要

Migraine is usually framed through trigeminovascular pathways and interactions among the brainstem, hypothalamus, and cortex. The cerebellum has received less attention, although human studies place it within circuits that process trigeminal nociception and vestibular signals. This narrative review examines anatomical and experimental work together with imaging, genetic, and clinical studies, giving greatest weight to direct human migraine evidence. Repeated-measures imaging suggests that cerebellar connectivity changes across the migraine cycle, but the cohorts are small. Structural findings vary with analytic method, and population based testing does not show a general cerebellar deficit in common migraine. Evidence is more coherent in defined contexts: trigeminal stimulation recruits lobules VI/VIIIa and Crus I, vestibular migraine involves posterior cerebellar and wider vestibular-sensory networks, and treatment imaging shows cerebellar changes without localizing the site of CGRP-directed action. Findings in medication-overuse headache and familial hemiplegic migraine provide additional state-related and mechanistic clues. Taken together, the cerebellum is best viewed as a modulatory component of distributed migraine networks, with possible roles in sensory gain and vestibular integration. It is neither a demonstrated attack generator nor a validated treatment target. The next step is to test whether within-person cerebellar measures reproduce across attacks and whether intervention changes a prespecified circuit-level endpoint.